The present invention relates generally to methods for forming integrated circuit chips, and more particularly, to a method for substantially eliminating conductive line cracking in an integrated circuit chip.
An integrated circuit chip comprises an array of devices formed in a semiconductor substrate, with the contacts for these devices interconnected by patterns of conductive wires. As the density of devices fabricated on a given chip increases, problems arise in providing reliable interconnections between the various devices. In order to take full advantage of the device and circuit density on a given chip, it is necessary to make interconnections among the various devices and circuit elements in the chip in a high density manner. A particular problem has arisen in the fabrication of high density conductive lines due to the prevalence of cracking and gaps forming in those lines. This problem is particularly evident in integrated circuit memory arrays where frequent cracks have been found in wordlines thereby directly affecting the reliability of the integrated circuit memory.